[Frooxius]

Thanks ^_^'

slbmeh: well that's hard to say, because it has features of both and some additional ones. Furthermore, you can program it to behave either like MCU or CPU from the outside viewpoint. However internally... MCU's have separate program and data memory, while the program one is read only. AttoWPU has several memories for data and two for program. One for attocode, which is executed directly and another one for higher-level instructions, this one is however program+data. The memory for attocode also isn't strictly only for program, you can use it to store data too if you want, which also means that it's read write.

CPU's are also highly extensible, while MCU's have most of the important stuff integrated. AttoWPU shares both these traits: you can easily extend the architecture itself (by simply connecting another unit to the buses in parallel, this is one of the interesting feautres) by adding new units to the specification, for example units for outside communication and such, but they become part of the architecture itself, so you create actually a complex architecture, that can have most features integrated into it.

AttoWPU has integrated attocode memory and other smaller data memories, the larger memories are however external (it should be blue in the logical schematics, everything blue is external - not in the processor itself) but both internal and external are crucial, the external isn't usually just optional peripheral, so again, both CPU and MCU features.

It can be both universal and process almost any kind of program or simply used to control some circuit... it's really hard to say which one of them it is and that's quite logical, I wasn't trying to follow existing conventions, but rather create something more or less new.

So far, it's only implemented virtually (there's an emulator available), but I'm planning to create an hardware version of it using VHDL and FPGA, however I'm still gathering resources to buy myself some good FPGA kit (as well as selecting the right one) and of course, it's going to take some time. The project is still under development, though large portion of it is functional.

I wouldn't recommend using this specific architecture in practical use, as it's more a research kind of thing, where are not all features designed for practical use, but more for testing of the processor's behavior and features and then using them in derived architectures. For example, AttoWPU isn't that fast, because it changes bit by bit in each cycle. I deliberately introduced this redundancy to give programmer complete control over the process and give a lot of space for program optimization for competitions - something that AttoWPU tries to promote.

Another reason is very simple core. The circuit that will change bit by bit using a simple instruction is also very simple, it can be composed from a few dozen gates. I'm going to use this feature in the ZeptoWPU architecture, where I minimize the execution unit part also to minimum, so there will be just bunch of NAND gates and by sequencing NAND operations, you can build any kind of operation, because NAND is turing complete. So basically, this extremely simple processor will be able to behave like a very complex architecture with a few dozen gates plus some memory. It wouldn't be as fast, but I'm thinking of massive parallelization by duplicating the simple core many times and sharing one memory with the definition.

Of course, the AttoWPU architecture can be altered to perform faster, for example by changing several bits at once. This is a very good thing about modular design - you can change the behavior of the core that controls the buses or add and remove units and it doesn't affect any other part.